论文标题
扩展IBM功率体系结构中硬件交易内存的能力
Stretching the capacity of Hardware Transactional Memory in IBM POWER architectures
论文作者
论文摘要
市售处理器中的硬件交易内存（HTM）实现受到严格的容量限制的严重阻碍。实际上，这使当前的HTMS不适合许多现实世界中的内存数据库。本文提出了Si-HTM，该Si-HTM延伸了基础HTM的容量界限，从而将HTM开放到更广泛的应用程序类别。 Si-HTM利用IBM功率体系结构的HTM实现，并使用软件层提供快照隔离的单反转实现。与HTM和基于软件的并发控制替代方案相比，SI-HTM具有提高的可伸缩性，相对于内存数据库基准测试的HTM相对可实现高达300％的速度。
The hardware transactional memory (HTM) implementations in commercially available processors are significantly hindered by their tight capacity constraints. In practice, this renders current HTMs unsuitable to many real-world workloads of in-memory databases. This paper proposes SI-HTM, which stretches the capacity bounds of the underlying HTM, thus opening HTM to a much broader class of applications. SI-HTM leverages the HTM implementation of the IBM POWER architecture with a software layer to offer a single-version implementation of Snapshot Isolation. When compared to HTM- and software-based concurrency control alternatives, SI-HTM exhibits improved scalability, achieving speedups of up to 300% relatively to HTM on in-memory database benchmarks.
