论文标题

虚拟化逻辑Qubits:一个2.5D用于错误校正量子计算的体系结构

Virtualized Logical Qubits: A 2.5D Architecture for Error-Corrected Quantum Computing

论文作者

Duckering, Casey, Baker, Jonathan M., Schuster, David I., Chong, Frederic T.

论文摘要

近年来,当前的近期量子设备在量子至上的演示中表现出色。然而,在中期,量子机将需要通过误差校正过渡到更大的可靠性,这可能是通过有希望的技术(例如表面代码),这些技术非常适合具有有限的值连接性的近期设备。我们发现量子内存,尤其是在2.5D体系结构中排列的带有Transmon Qubits的共振腔,可以有效地实现具有大量硬件节省和性能/忠诚度增长的表面代码。具体来说,我们通过将它们存储在分布在每个transmon的量子记忆的层中来虚拟化逻辑量子尺 *。 出乎意料的是,在许多记忆中分发每个逻辑量子量表对容错的影响最小,并导致更有效的操作。我们的设计允许在共享相同物理地址的逻辑量子位之间快速的横向CNOT操作,该物理地址比晶格手术CNOT快6倍。我们开发了一种新颖的嵌入,可从额外的紧凑度优化中,再加上2倍的透射率,再加上2倍。 尽管虚拟化的逻辑Qubit(VLQ)在序列化中支付了10倍的惩罚,但横向CNOT和面积效率的优势导致性能与仅2D Transmon-Formmon-Formon-farly Architectures相当。我们的模拟显示可容忍度可与2D架构相当,同时节省大量硬件。此外,对于固定数量的Transmon Quit,VLQ可以更快地产生魔术状态1.22倍。这是对未来耐故障量子计算机的关键基准。 VLQ大大降低了容错的硬件要求,并将概念验证的实验证明与大约10个逻辑Qubits进行了证明,总共只需要11个Transmons和9个附带的腔体。

Current, near-term quantum devices have shown great progress in recent years culminating with a demonstration of quantum supremacy. In the medium-term, however, quantum machines will need to transition to greater reliability through error correction, likely through promising techniques such as surface codes which are well suited for near-term devices with limited qubit connectivity. We discover quantum memory, particularly resonant cavities with transmon qubits arranged in a 2.5D architecture, can efficiently implement surface codes with substantial hardware savings and performance/fidelity gains. Specifically, we *virtualize logical qubits* by storing them in layers distributed across qubit memories connected to each transmon. Surprisingly, distributing each logical qubit across many memories has a minimal impact on fault tolerance and results in substantially more efficient operations. Our design permits fast transversal CNOT operations between logical qubits sharing the same physical address which are 6x faster than lattice surgery CNOTs. We develop a novel embedding which saves ~10x in transmons with another 2x from an additional optimization for compactness. Although Virtualized Logical Qubits (VLQ) pays a 10x penalty in serialization, advantages in the transversal CNOT and area efficiency result in performance comparable to 2D transmon-only architectures. Our simulations show fault tolerance comparable to 2D architectures while saving substantial hardware. Furthermore, VLQ can produce magic states 1.22x faster for a fixed number of transmon qubits. This is a critical benchmark for future fault-tolerant quantum computers. VLQ substantially reduces the hardware requirements for fault tolerance and puts within reach a proof-of-concept experimental demonstration of around 10 logical qubits, requiring only 11 transmons and 9 attached cavities in total.

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