论文标题
Atlas Inner Tracker Pixel检测器读数升级的千兆位收发器
A gigabit transceiver for the ATLAS inner tracker pixel detector readout upgrade
论文作者
论文摘要
本文介绍了Atlas Inner Tracker（ITK）Pixel检测器读数升级的GBCR的千兆收发器应用程序（ASIC）的设计和仿真结果。 GBCR具有四个上游接收器通道和一个下游发射器通道。每个上游通道在5.12 Gbps上运行，而下游通道则为2.56 Gbps。在每个上游通道中，GBCR通过5米34-美国的钢丝量表（AWG）双轴电缆接收到的信号，用恢复的时钟保留数据，并驱动光学发射器。在下游通道中，GBCR从光接收器接收数据，并驱动与上游通道相同类型的电缆。上游通道的输出抖动为26.5 PS，电缆为33.5 PS后，下游通道的抖动。每个上游通道都消耗78兆瓦，每个下游通道都消耗27兆瓦。上游测试通道的仿真结果表明，除了基线通道的线性均衡外，还可以通过使用饲料向前均衡器（FFE） +决策反馈均衡（DFE）来实现大量抖动减少。 GBCR采用65 nm的CMOS技术设计。
This paper presents the design and simulation results of a gigabit transceiver Application Specific Integrated Circuit (ASIC) called GBCR for the ATLAS Inner Tracker (ITk) Pixel detector readout upgrade. GBCR has four upstream receiver channels and a downstream transmitter channel. Each upstream channel operates at 5.12 Gbps, while the downstream channel operates at 2.56 Gbps. In each upstream channel, GBCR equalizes a signal received through a 5-meter 34-American Wire Gauge (AWG) twin-axial cable, retimes the data with a recovered clock, and drives an optical transmitter. In the downstream channel, GBCR receives the data from an optical receiver and drives the same type of cable as the upstream channels. The output jitter of an upstream channel is 26.5 ps and the jitter of the downstream channel after the cable is 33.5 ps. Each upstream channel consumes 78 mW and each downstream channel consumes 27 mW. Simulation results of the upstream test channel suggest that a significant jitter reduction could be achieved with minimally increased power consumption by using a Feed Forward Equalizer (FFE) + Decision Feedback Equalization (DFE) in addition to the linear equalization of the baseline channel. GBCR is designed in a 65-nm CMOS technology.
