论文标题
Gosipgui控制和基准读数电子前端的框架
The GosipGUI framework for control and benchmarking of readout electronics front-ends
论文作者
论文摘要
GOSIP（千兆光学串行接口协议）通过多种前端电子设备和位于读取主机PC中的Kinpex PCIE接收器板之间的光纤提供通信。 近年来，已经开发了一堆设备驱动程序软件来利用此硬件进行多种数据采集方案。在此驱动程序基础之上，已经创建了几个图形用户界面（GUI）。这些GUI基于QT图形库，并以模块化的方式设计：所有常见功能，例如带有前端的通用I/O，配置文件的处理和窗口设置，均由Framework类Gosipgui处理。在此类Gosipgui框架的QT工作区中，特定的子类可以实现其他用于操作不同GOSIP前端模块的Windows。这些由GSI实验电子部开发的读数模块是Febex采样ADC，TAMEX FPGA-TDCS或波兰QFWS。 对于每种前端，GUIS允许监视特定的寄存器内容，设置工作配置以及在数据采集过程中进行交互更改参数，例如采样阈值。在电子实验室或检测器洞穴中的前端进行资格和调整时，后者非常有用。此外，其中一些Gosipgui实现已配备了用于在原型质量生产中大多自动测试ASIC的功能。这已应用于目前正在建设的熊猫实验的APFEL-ASIC组件，以及公平的梁诊断读数系统波兰。
The GOSIP (Gigabit Optical Serial Interface Protocol) provides communication via optical fibres between multiple kinds of front-end electronics and the KINPEX PCIe receiver board located in the readout host PC. In recent years a stack of device driver software has been developed to utilize this hardware for several scenarios of data acquisition. On top of this driver foundation, several graphical user interfaces (GUIs) have been created. These GUIs are based on the Qt graphics libraries and are designed in a modular way: All common functionalities, like generic I/O with the front-ends, handling of configuration files, and window settings, are treated by a framework class GosipGUI. In the Qt workspace of such GosipGUI frame, specific sub classes may implement additional windows dedicated to operate different GOSIP front-end modules. These readout modules developed by GSI Experiment Electronics department are for instance FEBEX sampling ADCs, TAMEX FPGA-TDCs, or POLAND QFWs. For each kind of front-end the GUIs allow to monitor specific register contents, to set up the working configuration, and to interactively change parameters like sampling thresholds during data acquisition. The latter is extremely useful when qualifying and tuning the front-ends in the electronics lab or detector cave. Moreover, some of these GosipGUI implementations have been equipped with features for mostly automatic testing of ASICs in a prototype mass production. This has been applied for the APFEL-ASIC component of the PANDA experiment currently under construction, and for the FAIR beam diagnostic readout system POLAND.
