论文标题

SimDive:具有可调精度的FPGA的近似Simd软乘数 - 乘数

SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable Accuracy

论文作者

Ebrahimi, Zahra, Ullah, Salim, Kumar, Akash

论文摘要

无处不在的多媒体和深神经网络(DNN)应用程序中对数据级并行性和可变精度的不断增长的追求,激励了单个指令,多个数据(SIMD)架构的使用。为了减轻能源作为其主要资源限制,近似计算已经重新出现,尽管主要专门用于其应用程序特定的集成电路(ASIC)实现。本文首次提出了基于新颖的乘数和分隔的SIMD体系结构,具有可调精度,针对现场可编程的门阵列(FPGAS)。提出的混合体系结构实现了米切尔的算法,并支持8至32位的精确变异性。从Vivado,Multimedia和DNN应用获得的实验结果表明,所提出的体系结构(SISD和SIMD)优于准确和最新的近似近似对应物。特别是,拟议的SISD分隔线优于Xilinx提供的准确知识产权(IP)分隔线,速度更高4倍,能量降低了4.6倍,并且仅容忍<0.8%。此外,提出的SIMD乘数二级用户分别在面积,吞吐量,功率和能源方面提高了高达26%,45%,36%和56%的速度,从而获得了超过26%,45%,36%和56%的速度。

The ever-increasing quest for data-level parallelism and variable precision in ubiquitous multimedia and Deep Neural Network (DNN) applications has motivated the use of Single Instruction, Multiple Data (SIMD) architectures. To alleviate energy as their main resource constraint, approximate computing has re-emerged,albeit mainly specialized for their Application-Specific Integrated Circuit (ASIC) implementations. This paper, presents for the first time, an SIMD architecture based on novel multiplier and divider with tunable accuracy, targeted for Field-Programmable Gate Arrays (FPGAs). The proposed hybrid architecture implements Mitchell's algorithms and supports precision variability from 8 to 32 bits. Experimental results obtained from Vivado, multimedia and DNN applications indicate superiority of proposed architecture (both SISD and SIMD) over accurate and state-of-the-art approximate counterparts. In particular, the proposed SISD divider outperforms the accurate Intellectual Property (IP) divider provided by Xilinx with 4x higher speed and 4.6x less energy and tolerating only < 0.8% error. Moreover, the proposed SIMD multiplier-divider supersede accurate SIMD multiplier by achieving up to 26%, 45%, 36%, and 56% improvement in area, throughput, power, and energy, respectively.

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