论文标题
硬件实现芦苇 - 穆勒代码的迭代投影聚集解码
Hardware Implementation of Iterative Projection-Aggregation Decoding of Reed-Muller Codes
论文作者
论文摘要
在这项工作中，我们提出了一个简化和相应的硬件体系结构，用于硬化递归投影投影 - 聚集（RPA）对芦苇 - 穆勒（RM）代码的解码。特别是，我们将RPA解码的递归结构转化为更简单，迭代的结构，并具有最小的误差校正降解。我们对RM（7,3）的仿真结果表明，所提出的简化具有较小的错误校正性能降解（根据通道交叉概率为0.005），同时将平均计算数减少了40％。此外，我们描述了第一个用于简化RPA解码的完全并行硬件体系结构。我们在Xilinx VirTex-7 FPGA上介绍了RM（6,3）代码的FPGA实现结果，这表明我们所提出的架构以80 MHz的频率达到了171 Mbps的吞吐量。
In this work, we present a simplification and a corresponding hardware architecture for hard-decision recursive projection-aggregation (RPA) decoding of Reed-Muller (RM) codes. In particular, we transform the recursive structure of RPA decoding into a simpler and iterative structure with minimal error-correction degradation. Our simulation results for RM(7,3) show that the proposed simplification has a small error-correcting performance degradation (0.005 in terms of channel crossover probability) while reducing the average number of computations by up to 40%. In addition, we describe the first fully parallel hardware architecture for simplified RPA decoding. We present FPGA implementation results for an RM(6,3) code on a Xilinx Virtex-7 FPGA showing that our proposed architecture achieves a throughput of 171 Mbps at a frequency of 80 MHz.
