论文标题
NeuralTree:256通道0.227- $ $ J/类的多功能神经活动分类和闭环神经调节SOC
NeuralTree: A 256-Channel 0.227-$μ$J/Class Versatile Neural Activity Classification and Closed-Loop Neuromodulation SoC
论文作者
论文摘要
带有片上机器学习的闭环神经界面可以检测和抑制神经系统疾病中的疾病症状或恢复瘫痪患者的功能损失。虽然高密度的神经记录可以提供丰富的神经活动信息以进行准确的疾病状态检测,但现有系统的通道计数较低,可扩展性较差,这可能会限制其治疗功效。这项工作提出了高度可扩展的闭环神经界面SOC,可以克服这些局限性。提出了一个256通道的时间划分多路复用(TDM)前端,并提出了两个步骤快速的混合信号DC伺服回路(DSL),以记录高空间分辨率神经活动并执行通道选择性的脑状态推断。树结构的神经网络(NeuralTree)分类处理器以患者和疾病特异性的方式提取了丰富的神经生物标志物。经过能源感知的学习算法培训,神经分类器检测到最佳能量 - 清晰度的折衷方案的潜在疾病(例如癫痫和运动障碍)的症状。 16通道高压(HV)兼容的神经刺激器通过将电荷平衡的双相电流脉冲传递到大脑,从而关闭了治疗环。拟议的SOC是在65 nm CMO中制造的,并在0.014mm $^2 $/频道的紧凑型区域中实现了0.227- $ $ j/class的能源效率。 SOC在人类脑电图(EEG)和颅内EEG(IEEG)癫痫数据集上进行了广泛的验证,分别获得了95.6%/94%的敏感性和96.8%/96.9%的特异性。使用软$ $ $ ECOG阵列和多域生物标志物提取的体内神经记录进一步在癫痫大鼠模型上进一步进行。此外,在文献中首次证明了帕金森氏病(PD)的片片分类(LFPS)。
Closed-loop neural interfaces with on-chip machine learning can detect and suppress disease symptoms in neurological disorders or restore lost functions in paralyzed patients. While high-density neural recording can provide rich neural activity information for accurate disease-state detection, existing systems have low channel counts and poor scalability, which could limit their therapeutic efficacy. This work presents a highly scalable and versatile closed-loop neural interface SoC that can overcome these limitations. A 256-channel time-division multiplexed (TDM) front-end with a two-step fast-settling mixed-signal DC servo loop (DSL) is proposed to record high-spatial-resolution neural activity and perform channel-selective brain-state inference. A tree-structured neural network (NeuralTree) classification processor extracts a rich set of neural biomarkers in a patient- and disease-specific manner. Trained with an energy-aware learning algorithm, the NeuralTree classifier detects the symptoms of underlying disorders (e.g., epilepsy and movement disorders) at an optimal energy-accuracy tradeoff. A 16-channel high-voltage (HV) compliant neurostimulator closes the therapeutic loop by delivering charge-balanced biphasic current pulses to the brain. The proposed SoC was fabricated in 65-nm CMOS and achieved a 0.227-$μ$J/class energy efficiency in a compact area of 0.014mm$^2$/channel. The SoC was extensively verified on human electroencephalography (EEG) and intracranial EEG (iEEG) epilepsy datasets, obtaining 95.6%/94% sensitivity and 96.8%/96.9% specificity, respectively. In vivo neural recordings using soft $μ$ECoG arrays and multi-domain biomarker extraction were further performed on a rat model of epilepsy. In addition, for the first time in literature, on-chip classification of rest-state tremor in Parkinson's disease (PD) from human local field potentials (LFPs) was demonstrated.