论文标题
赛道纳米线条带的多域磁铁隧道连接点
A Multi-domain Magneto Tunnel Junction for Racetrack Nanowire Strips
论文作者
论文摘要
域壁存储器（DWM）具有SRAM类访问性能，低能量，高耐力，高密度和CMOS兼容性。最近，偏移的可靠性和加工记忆（PUM）提案提出了对DWM纳米线一部分中并行或反平行域的数量进行计数的数量。在本文中，我们提出了一个多域磁通孔连接（MTJ），该连接可以检测出不同的电阻水平，这是平行或反行域数量的函数。使用LLG使用详细的微磁模拟，我们证明了多域MTJ，研究其宏观大小的弹性对过程变化的好处，并提出了用于扩展多域MTJ大小的宏模型。我们的结果表明可伸缩到七域，同时保持16.3mv的感觉边缘。
Domain-wall memory (DWM) has SRAM class access performance, low energy, high endurance, high density, and CMOS compatibility. Recently, shift reliability and processing-using-memory (PuM) proposals developed a need to count the number of parallel or anti-parallel domains in a portion of the DWM nanowire. In this paper we propose a multi-domain magneto-tunnel junction (MTJ) that can detect different resistance levels as a function of a the number of parallel or anti-parallel domains. Using detailed micromagnetic simulation with LLG, we demonstrate the multi-domain MTJ, study the benefit of its macro-size on resilience to process variation and present a macro-model for scaling the size of the multi-domain MTJ. Our results indicate scalability to seven-domains while maintaining a 16.3mV sense margin.
