论文标题

准循环LDPC代码的高通量解码器,对于连续可变量子键分配系统的精度有限

High-throughput decoder of quasi-cyclic LDPC codes with limited precision for continuous-variable quantum key distribution systems

论文作者

Zhou, Chuang, Li, Yang, Ma, Li, Yang, Jie, Huang, Wei, Wang, Heng, Luo, Yujie, Lau, Francis C. M., Li, Yong, Xu, Bingjie

论文摘要

对于连续变量的量子键分布(CV-QKD)系统,证明了MBPS的秘密密钥速率更多,但是不允许实时后处理,这受到后处理中误差校正解码的吞吐量的限制。在本文中,提出并实施了高通量基于FPGA的准循环LDPC解码器,以首次支持MBPS实时秘密密钥率生成CV-QKD。残留的位误差校正算法用于解决由解码器的有限精度引起的高帧误差率(FER)的问题。具体而言,在商业FPGA上实现了具有典型代码速率的CV-QKD系统的实时高速解码,分别可以在17.97 Mbps和2.48 MBPS实时的典型传输速度下,分别实现了两个360.92Mbps和194.65Mbps的吞吐量,分别可以支持17.97 Mbps和2.48 Mbps实时的键入键合25k和50k在典型的键盘下25k和50k。所提出的方法为在安全大都会区域网络中的高利率实时CV-QKD部署铺平了道路。

More than Mbps secret key rate was demonstrated for continuous-variable quantum key distribution (CV-QKD) systems, but real-time postprocessing is not allowed, which is restricted by the throughput of the error correction decoding in postprocessing. In this paper, a high-throughput FPGA-based quasi-cyclic LDPC decoder is proposed and implemented to support Mbps real-time secret key rate generation for CV-QKD for the first time. A residual bit error correction algorithm is used to solve the problem of high frame errors rate (FER) caused by the limited precision of the decoder. Specifically, real-time high-speed decoding for CV-QKD systems with typical code rates 0.2 and 0.1 is implemented on a commercial FPGA, and two throughputs of 360.92Mbps and 194.65Mbps are achieved, respectively, which can support 17.97 Mbps and 2.48 Mbps real-time generation of secret key rates under typical transmission distances of 25km and 50km, correspondingly. The proposed method paves the way for high-rate real-time CV-QKD deployment in secure metropolitan area network.

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