论文标题
一个算法 - 硬件共同设计框架，以克服混合信号DNN加速器的缺陷
An Algorithm-Hardware Co-design Framework to Overcome Imperfections of Mixed-signal DNN Accelerators
论文作者
论文摘要
近年来，已经提出了基于记忆（PIM）的混合标志设计的处理，并作为具有超高吞吐量的能量和面积效率解决方案，以加速DNN计算。但是，PIM设计对噪声，重量和电导变化等缺陷敏感，这些变化极大地降低了DNN精度。为了解决这个问题，我们提出了一种新颖的算法 - 硬件共同设计框架，此后称为Hybridac，同时避免由于缺陷而避免准确的降解，改善了区域利用，并减少了数据流动和能量耗散。我们得出了一种数据感知的权重选择方法，该方法不需要再培训来保留其原始性能。它使用可靠的数字加速器计算出少量变异敏感权重的结果的一部分，而主计算则以模拟PIM单元进行。这是第一批提供变化型体系结构的作品，而且还大大改善了现有设计的区域，功能和能量。通过降低ADC精度，周围电路和杂交量化来优化设计，可以通过降低ADC精度，外围电路和杂交量化来利用上述权重选择方法。我们的全面实验表明，即使存在高达50％的变化，Hybridac也可以将各种数据集的不同DNN的准确性降解从60-90％（无保护）降低到1-2％。除了提供更强大的计算外，与以撒（SRE）相比，Hybridac还可以改善执行时间，能源，面积，功率，区域效率和发电效率26％（14％），52％（40％），28％（28％），57％（45％），43％（43％（5x），以及81％（5X），以及81％（3.9x）
In recent years, processing in memory (PIM) based mixedsignal designs have been proposed as energy- and area-efficient solutions with ultra high throughput to accelerate DNN computations. However, PIM designs are sensitive to imperfections such as noise, weight and conductance variations that substantially degrade the DNN accuracy. To address this issue, we propose a novel algorithm-hardware co-design framework hereafter referred to as HybridAC that simultaneously avoids accuracy degradation due to imperfections, improves area utilization, and reduces data movement and energy dissipation. We derive a data-movement-aware weight selection method that does not require retraining to preserve its original performance. It computes a fraction of the results with a small number of variation-sensitive weights using a robust digital accelerator, while the main computation is performed in analog PIM units. This is the first work that not only provides a variation-robust architecture, but also improves the area, power, and energy of the existing designs considerably. HybridAC is adapted to leverage the preceding weight selection method by reducing ADC precision, peripheral circuitry, and hybrid quantization to optimize the design. Our comprehensive experiments show that, even in the presence of variation as high as 50%, HybridAC can reduce the accuracy degradation from 60 - 90% (without protection) to 1 - 2% for different DNNs across diverse datasets. In addition to providing more robust computation, compared to the ISAAC (SRE), HybridAC improves the execution time, energy, area, power, area-efficiency, and power-efficiency by 26%(14%), 52%(40%), 28%(28%), 57%(45%), 43%(5x), and 81%(3.9x), respectively
