论文标题
FPGA硬件加速度用于基于功能的相对导航应用程序
FPGA Hardware Acceleration for Feature-Based Relative Navigation Applications
论文作者
论文摘要
在基于视觉的相对导航中,两个点云之间的刚性转换估计是一个具有挑战性的问题。本文针对利用点云和图像登记算法的实时导航解决方案,为功率和资源约束姿势估计框架开发了高性能航空电子学。开发了基于现场编程的门阵列(FPGA)嵌入式体系结构,以加快点云之间的相对姿势的估计,并在与单个点集相对应的图像特征的帮助下。在算法水平上,姿势估计方法是对相对态度和翻译估计的最佳线性态度和翻译估计量(OLTAE)的适应。在体系结构层面上,提出的嵌入式解决方案是一种硬件/软件共同设计,可评估裸机硬件上的OLTAE计算以进行高速状态估计。将OLTAE算法的有限精度FPGA评估与MATLAB上的双重精确评估进行了比较,以进行性能分析和误差量化。提出的有限级OLTAE加速器的实施结果证明了基于FPGA的姿势估计的高性能计算能力,同时提供了相对的数值错误低于7%。
Estimation of rigid transformation between two point clouds is a computationally challenging problem in vision-based relative navigation. Targeting a real-time navigation solution utilizing point-cloud and image registration algorithms, this paper develops high-performance avionics for power and resource constrained pose estimation framework. A Field-Programmable Gate Array (FPGA) based embedded architecture is developed to accelerate estimation of relative pose between the point-clouds, aided by image features that correspond to the individual point sets. At algorithmic level, the pose estimation method is an adaptation of Optimal Linear Attitude and Translation Estimator (OLTAE) for relative attitude and translation estimation. At the architecture level, the proposed embedded solution is a hardware/software co-design that evaluates the OLTAE computations on the bare-metal hardware for high-speed state estimation. The finite precision FPGA evaluation of the OLTAE algorithm is compared with a double-precision evaluation on MATLAB for performance analysis and error quantification. Implementation results of the proposed finite-precision OLTAE accelerator demonstrate the high-performance compute capabilities of the FPGA-based pose estimation while offering relative numerical errors below 7%.