论文标题

模拟硅悬挂键逻辑系统中的充电缺陷以评估逻辑鲁棒性

Simulating Charged Defects in Silicon Dangling Bond Logic Systems to Evaluate Logic Robustness

论文作者

Ng, Samuel S. H., Croshaw, Jeremiah, Walter, Marcel, Wille, Robert, Wolkow, Robert, Walus, Konrad

论文摘要

纳米尺度逻辑设备的实验证明激发了基于量子点的新兴逻辑系统的最新研究兴趣,由由硅悬挂键(SIDB)制成的原子尺寸的量子点以及用于该技术设计的计算机辅助设计工具SIQAD的可用性。最新的设计自动化框架已使SIDB电路的合成达到$ 32 \ times10^3 \,\ text {nm}^{2} $ - 比其手工设计的对应机的数量级要复杂得多。但是,当前的SIDB模拟引擎未考虑缺陷,这对于这些相当大的系统很重要。这项工作提出了一种将固定电荷仿真纳入既定基态模型中的公式,以涵盖重要的缺陷类,该缺陷对附近的SIDB具有不可忽略的影响,$ 10 \,\ text {nm} $ scale及以后。通过将其实施到SIQAD的仿真引擎中,并在多种缺陷类型上进行了计算再现实验来验证该公式,从而揭示了高度的准确性。新的能力适用于研究几个已建立的逻辑门的容忍度,以与引入附近的单个缺陷一起建立相应的最小要求清除率。将这些发现与现有指标进行比较,以构成逻辑鲁棒性研究的基础。

Recent research interest in emerging logic systems based on quantum dots has been sparked by the experimental demonstration of nanometer-scale logic devices composed of atomically sized quantum dots made of silicon dangling bonds (SiDBs), along with the availability of SiQAD, a computer-aided design tool designed for this technology. Latest design automation frameworks have enabled the synthesis of SiDB circuits that reach the size of $32\times10^3\,\text{nm}^{2}$ -- orders of magnitude more complex than their hand-designed counterparts. However, current SiDB simulation engines do not take defects into account, which is important to consider for these sizable systems. This work proposes a formulation for incorporating fixed-charge simulation into established ground state models to cover an important class of defects that has a non-negligible effect on nearby SiDBs at the $10\,\text{nm}$ scale and beyond. The formulation is validated by implementing it into SiQAD's simulation engine and computationally reproducing experiments on multiple defect types, revealing a high level of accuracy. The new capability is applied towards studying the tolerance of several established logic gates against the introduction of a single nearby defect to establish the corresponding minimum required clearance. These findings are compared against existing metrics to form a foundation for logic robustness studies.

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